vs  vs  
MaxRelDiff  3.925580826263917e04  7.191229955145954e04 
VectorRelDiff  3.161913979263145e04  5.793222860496758e04 
VectorNormDiff  2.055964094892033e01  3.766914050479500e01 
2 
3 
4 
5 
> 5 

dpl_stencil_1p x[i] = b(i) + a(i)*x[i1] 
850  1000  900  900  1125 
dpl_stencil_o_1p x[i] = c(i)*x[i] + b(i) + a(i)*x[i1] 
1250  1250  900  900  950 
dpl_stencil_div_1p x[i] = b(i) + a(i)*x[i1] 
750  600  500  600  600 
dpl_stencil_o_div_1p x[i] = c(i)*x[i] + b(i) + a(i)/x[i1] 
650  600  500  500  650 
dpl_stencil_acc acc = b(i) + a(i)*acc 
1250  1125  1250  1250  1450 
dpl_stencil_div_acc acc = b(i) + a(i)/acc 
300  400  450  450  550 
dpl_stencil_2p x[i] = a(i)*x[i1] + b(i) + c(i)*x[i2] 
^{(1)}  4000  2500  1750  2250 
dpl_stencil_o_2p x[i] = d(i)*x[i] + b(i) + a(i)*x[i1] + c(i)*x[i2] 
^{(1)}  2000  1000  1250  1000 
dpl_stencil x[i] = b(i) + ∑_{j<i}a(i,j)*x[i] 
150  175  200  200  250 
Core(TM) Duo E8600  Core(TM) i59400  Xeon(R) Silver 4110^{(1)}  Xeon(R) Gold 6226R^{(1)}  
dpl_stencil_1p x[i] = b(i) + a(i)*x[i1] 
54%  51%  71%  73% 
dpl_stencil_o_1p x[i] = c(i)*x[i] + b(i) + a(i)*x[i1] 
30%  47%  58%  74% 
dpl_stencil_div_1p x[i] = b(i) + a(i)*x[i1] 
23%  58%  76%  82% 
dpl_stencil_o_div_1p x[i] = c(i)*x[i] + b(i) + a(i)/x[i1] 
24%  52%  69%  83% 
dpl_stencil_acc acc = b(i) + a(i)*acc 
26%  53%  72%  71% 
dpl_stencil_div_acc acc = b(i) + a(i)/acc 
64%  68%  84%  86% 
dpl_stencil_2p x[i] = a(i)*x[i1] + b(i) + c(i)*x[i2] 
^{(2)}  41%  66%  72% 
dpl_stencil_o_2p x[i] = d(i)*x[i] + b(i) + a(i)*x[i1] + c(i)*x[i2] 
^{(2)}  41%  66%  72% 
dpl_stencil x[i] = b(i) + ∑_{j<i}a(i,j)*x[i] 
43%  73%  63%  60% 
parallel/serial  54%  84%  88% 
parallel/serial  56%  63%  54% 
parallel/quick parallel  76%  65%  56%  40%  30%  24%  20%  22%  21% 
parallel/serial  20%  75%  79%  77%  73%  70%  66%  63%  60% 
parallel/parallel Vincent  170%  20%  40%  65%  53%  55%  53%  50%  50% 
20000  22.38%  24.07%  24.72%  25.49% 
30000  6.81%  7.52%  7.63%  8.17% 
40000  7.04%  7.75%  7.89%  8.29% 
20000  43.08%  49.97%  52.41%  54.7% 
30000  36.64%  43.29%  45.71%  47.85% 
40000  30.15%  37.15%  39.21%  41.18% 
parallel/quick_parallel  44.79%  39.68%  44%  41.03%  29.17%  25.71%  20.41%  11.24% 
parallel/serial  113%  18.75%  50.88%  59.65%  58.54%  61.19%  61.76%  59.42% 
quick_parallel/serial  272%  97%  12.28%  31.58%  41.46%  47.76%  51.96%  54.28% 
parallel/quick_parallel  36.79%  40.8%  42%  38.79%  32.25%  26.27%  25.45%  18.29% 
parallel/serial  41.23%  69.17%  73.48%  74.64%  74.56%  73.64%  73.23%  69.54% 
quick_parallel/serial  7.02  47.92  54.27%  58.57%  62.44%  64.44%  64.09%  62.73% 
parallel/serial  6.14%  17.75%  28%  37%  41%  50%  54% 
parallel/serial  61.79%  65.11%  66.68%  66.87%  66.91%  67.73%  68.54% 